Generally speaking, a voltage controlled oscillator (VCO) is contained in a phase locked loop (PLL) circuit and applied to a digital circuit or an analog circuit. The application is particularly common in the communication field that requires wide range adjustment of frequency.
Please refer to FIG. 1, which illustrates a conventional VCO. The VCO is disclosed in U.S. Pat. No. 7,038,552. As shown in the FIG. 1, a first inductor 2 is connected between a voltage source (Vcc) and a drain of a first field effect transistor (FET) 6. A source of the first FET 6 is connected to a current source 10. Similarly, a second inductor 22 is connected between the voltage source (Vcc) and a drain of a second FET 26. A source of the second FET 26 is connected to the current source 10. Furthermore, the drain of the first FET 6 and a gate of the second FET 26 are connected to each other; the drain of the second FET 26 and a gate of the first FET 6 are also connected to each other. Finally, a variable capacitance is provided between the drain of the first FET 6 (node a) and the drain of the second FET 26 (node b). Therefore, the inductors (the first inductor 2 plus the second inductor 22) connected in parallel with the variable capacitance between node a and node b are seen as a LC oscillating circuit. Further, the variable capacitance includes a switch capacitance bank 40 and a varactor unit 42. The switch capacitance bank 40 is used for coarse-tuning output frequency of the VCO while the varactor unit 42 is used for fine-tuning the output frequency of the VCO.
As shown in the FIG. 1, the switch capacitance bank 40 comprises a plurality of controllable capacitor paths connected in parallel. Each controllable capacitor path includes a first capacitor 50, a switch FET 54 and a second capacitor 52 connected in series between node a and node b. By controlling a gate of the switch FET 54, each controllable capacitor path can selectively achieve connection or disconnection between node a and node b. When a controllable capacitor path is connected between node a and node b, an equivalent capacitance value of the variable capacitance will be increased; similarly, when a controllable capacitor path is disconnected between node a and node b, the equivalent capacitance value of the variable capacitance will be decreased. Consequently, the output frequency of VCO can be coarse-tuned by the above described method.
Further, as shown in the FIG. 1, the Varactor unit 42 comprises two FETs 60 and 62 whose drain and source are connected to each other; while gates of the FETs 60 and 62 are connected respectively to node a and node b and drains of FETs 60 and 62 are connected to a voltage control terminal 64. When an input voltage of the voltage control terminal 64 changes, the change in the voltage difference between drain and gate of FET 60 and 62 leads to changes in the capacitance value of FET 60 and 62. Consequently, by changing the input voltage of voltage control terminal 64, the output frequency of VCO can be fine-tuned. In addition to FETs 60 and 62 changing capacitance values in response to the input voltage, the FETs 60 and 62 in the varactor unit 42 also can be replaced by varicap diodes.
Please refer to FIG. 2, which illustrates the output frequency of a conventional VCO. As illustrated, the adjustable output frequency tuning range is between f0˜f7, in which a first band (f5˜f7) is completed by a first capacitance value c1 provided by the first controllable capacitor path of the switch capacitance bank 40 and a changeable capacitance value (Δc) provided by varactor unit 42; a second band II (f3˜f6) is completed by the first capacitance value c1 plus a second capacitance value c2 (i.e. c1+c2) provided respectively by the first and second controllable capacitor paths in the switch capacitance bank 40 and the changeable capacitance value (Δc) provided by the varactor unit 42; a third band III (f1˜f4) is completed by the first capacitance value c1 plus the second capacitance value c2 and a third capacitance value (i.e. c1+c2+c3), provided respectively by the first, second and third controllable capacitor paths in the switch capacitance bank 40 and the changeable capacitance value (Δc) provided by varactor unit 42; a fourth band IV (f0˜f2) is completed by the first capacitance value c1 plus the Second capacitance value c2, the third capacitance value c3 and a fourth capacitance value c4 (i.e. c1+c2+c3+c4), provided respectively by the first, second, third and fourth controllable capacitor paths in switch capacitance bank 40 and the changeable capacitance value (Δc) provided by varactor unit 42. Since the output frequency of VCO is proportional to 1/√{square root over (LC)} and the changeable capacitance value (Δc) provided by varactor unit 42 is fixed, as the capacitance value provided by the switch capacitance bank 40 increases, the band for which the output frequency of VCO responds to will become narrower.
Further, a frequency tuning sensitivity (Kvco) of the VCO is defined by its output frequency range divided by its input voltage range (Δf/ΔV). As illustrated by FIG. 2, the lower the conventional output frequency of VCO, the smaller Kvco. That is to say, the conventional VCO cannot provide a constant frequency tuning sensitivity (Kvco). From a designer's perspective, when Kvco varies according to the variation of output frequency, the overall PLL circuit design becomes complicated, particularly for the design of the loop filter connected to VCO in the PLL.